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an important notice at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. production data. tlv171 , tlv2171 , tlv4171 sbos783 ? september 2016 tlvx171 36-v, single-supply, low-power operational amplifiers for cost-sensitive systems 1 1 features 1 ? supply range: 2.7 v to 36 v, 1.35 v to 18 v ? low noise: 16 nv/ hz ? low offset drift: 1 v/ c (typical) ? emi-hardened with rfi-filtered inputs ? input range includes the negative supply ? unity-gain stable: 200-pf capacitive load ? rail-to-rail output ? gain bandwidth: 3 mhz ? low quiescent current: 525 a per amplifier ? high common-mode rejection: 105 db (typical) ? low bias current: 10 pa 2 applications ? transducers ? currency counters ? ac-dc converters ? power modules ? inverters ? test equipment ? battery-powered instruments ? tft-lcd drive circuits ? active filters 3 description the 36-v tlvx171 family provides a low-power option for cost-conscious industrial and personal electronics systems requiring an electromagnetic interference (emi)-hardened, low-noise, single-supply operational amplifier (op amp) that operates on supplies ranging from 2.7 v ( 1.35 v) to 36 v ( 18 v). the single-channel tlv171, dual-channel tlv2171, and quad-channel tlv4171 provide low offset, drift, quiescent current balanced with high bandwidth for the power. the devices are available in micropackages for space-constrained systems and feature identical specifications for maximum design flexibility. unlike most op amp, which are specified at only one supply voltage, the tlvx171 family is specified from 2.7 v to 36 v. input signals beyond the supply rails do not cause phase reversal. the tlvx171 family is stable with capacitive loads up to 200 pf. the input can operate 100 mv below the negative rail and within 2 v of the top rail during normal operation. these devices can operate with a full rail-to-rail input 100 mv beyond the top rail, but with reduced performance within 2 v of the top rail. the tlvx171 op amp family is specified from ? 40 c to +125 c. device information (1) part number package body size (nom) tlv171 soic (8) 4.90 mm 3.91 mm sot-23 (5) 2.90 mm 1.60 mm tlv2171 soic (8) 4.90 mm 3.91 mm vssop (8) 3.00 mm 3.00 mm tlv4171 soic (14) 8.65 mm 3.91 mm tssop (14) 5.00 mm 4.40 mm (1) for all available packages, see the orderable addendum at the end of the data sheet. offset voltage vs common-mode voltage offset voltage vs power supply productfolder sample &buy technical documents tools & software support &community
2 tlv171 , tlv2171 , tlv4171 sbos783 ? september 2016 www.ti.com product folder links: tlv171 tlv2171 tlv4171 submit documentation feedback copyright ? 2016, texas instruments incorporated table of contents 1 features .................................................................. 1 2 applications ........................................................... 1 3 description ............................................................. 1 4 revision history ..................................................... 2 5 pin configuration and functions ......................... 3 6 specifications ......................................................... 5 6.1 absolute maximum ratings ...................................... 5 6.2 esd ratings .............................................................. 5 6.3 recommended operating conditions ....................... 5 6.4 thermal information: tlv171 ................................... 6 6.5 thermal information: tlv2171 ................................. 6 6.6 thermal information: tlv4171 ................................. 6 6.7 electrical characteristics ........................................... 7 6.8 typical characteristics .............................................. 9 7 detailed description ............................................ 15 7.1 overview ................................................................. 15 7.2 functional block diagram ....................................... 15 7.3 feature description ................................................. 15 7.4 device functional modes ........................................ 19 8 application and implementation ........................ 20 8.1 application information ............................................ 20 8.2 typical application .................................................. 20 9 power supply recommendations ...................... 22 10 layout ................................................................... 22 10.1 layout guidelines ................................................. 22 10.2 layout example .................................................... 23 11 device and documentation support ................. 24 11.1 device support ...................................................... 24 11.2 documentation support ........................................ 25 11.3 related links ........................................................ 25 11.4 receiving notification of documentation updates 25 11.5 community resources .......................................... 25 11.6 trademarks ........................................................... 25 11.7 electrostatic discharge caution ............................ 25 11.8 glossary ................................................................ 25 12 mechanical, packaging, and orderable information ........................................................... 25 4 revision history date revision notes september 2016 * initial release.
3 tlv171 , tlv2171 , tlv4171 www.ti.com sbos783 ? september 2016 product folder links: tlv171 tlv2171 tlv4171 submit documentation feedback copyright ? 2016, texas instruments incorporated 5 pin configuration and functions tlv171: dbv package 5-pin sot-23 top view tlv171: d package 8-pin soic top view (1) nc indicates no internal connection. pin functions: tlv171 pin i/o description name tlv171 dbv d in ? 4 2 i negative (inverting) input in+ 3 3 i positive (noninverting) input nc (1) ? 1, 5, 8 ? no internal connection (can be left floating) out 1 6 o output v+ 5 7 ? positive (highest) power supply v ? 2 4 ? negative (lowest) power supply tlv2171: d and dgk packages 8-pin soic and vssop top view pin functions: tlv2171 pin i/o description name tlv2171 d dgk ? in a 2 2 i inverting input, channel a ? in b 6 6 i inverting input, channel b +in a 3 3 i noninverting input, channel a +in b 5 5 i noninverting input, channel b out a 1 1 o output, channel a out b 7 7 o output, channel b v ? 4 4 ? negative (lowest) power supply v+ 8 8 ? positive (highest) power supply 12 3 4 87 6 5 nc (1) v+ out nc (1) nc (1) - in +in v - 12 3 4 87 6 5 v+out b - in b +in b out a - in a +in a v - 12 3 54 v+- in out v - +in
4 tlv171 , tlv2171 , tlv4171 sbos783 ? september 2016 www.ti.com product folder links: tlv171 tlv2171 tlv4171 submit documentation feedback copyright ? 2016, texas instruments incorporated tlv4171: d and pw packages 14-pin soic and tssop top view pin functions: tlv4171 pin i/o description name d pw ? in a 2 2 i inverting input, channel a +in a 3 3 i noninverting input, channel a ? in b 6 6 i inverting input, channel b +in b 5 5 i noninverting input, channel b ? in c 9 9 i inverting input, channel c +in c 10 10 i noninverting input, channel c ? in d 13 13 i inverting input, channel d +in d 12 12 i noninverting input, channel d out a 1 1 o output, channel a out b 7 7 o output, channel b out c 8 8 o output, channel c out d 14 14 o output, channel d v ? 11 11 ? negative (lowest) power supply v+ 4 4 ? positive (highest) power supply 12 3 4 1413 12 11 out d- in d +in d v - out a - in a +in a v+ 56 7 10 98 +in c- in c out c +in b - in b out b
5 tlv171 , tlv2171 , tlv4171 www.ti.com sbos783 ? september 2016 product folder links: tlv171 tlv2171 tlv4171 submit documentation feedback copyright ? 2016, texas instruments incorporated (1) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions . exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) short-circuit to ground, one amplifier per package. 6 specifications 6.1 absolute maximum ratings over operating free-air temperature range, unless otherwise noted. (1) min max unit voltage supply voltage, v+ to v ? ? 20 20 v signal input pin (v ? ) ? 0.5 (v+) + 0.5 current signal input pin ? 10 10 ma output short-circuit (2) continuous temperature operating, t a ? 55 150 c junction, t j 150 storage, t stg ? 65 150 (1) jedec document jep155 states that 500-v hbm allows safe manufacturing with a standard esd control process. (2) jedec document jep157 states that 250-v cdm allows safe manufacturing with a standard esd control process. 6.2 esd ratings value unit v (esd) electrostatic discharge human-body model (hbm), per ansi/esda/jedec js-001 (1) 4000 v charged-device model (cdm), per jedec specification jesd22-c101 (2) 750 6.3 recommended operating conditions over operating free-air temperature range (unless otherwise noted) min nom max unit supply voltage (v+ ? v ? ) single supply 2.7 36 v dual supply 1.35 18 specified temperature ? 40 +125 c
6 tlv171 , tlv2171 , tlv4171 sbos783 ? september 2016 www.ti.com product folder links: tlv171 tlv2171 tlv4171 submit documentation feedback copyright ? 2016, texas instruments incorporated (1) for more information about traditional and new thermal metrics, see the semiconductor and ic package thermal metrics application report. 6.4 thermal information: tlv171 thermal metric (1) tlv171 unit d (soic) dbv (sot-23) 8 pins 5 pins r ja junction-to-ambient thermal resistance 149.5 245.8 c/w r jc(top) junction-to-case (top) thermal resistance 97.9 133.9 c/w r jb junction-to-board thermal resistance 87.7 83.6 c/w jt junction-to-top characterization parameter 35.5 18.2 c/w jb junction-to-board characterization parameter 89.5 83.1 c/w r jc(bot) junction-to-case (bottom) thermal resistance ? ? c/w (1) for more information about traditional and new thermal metrics, see the semiconductor and ic package thermal metrics application report. 6.5 thermal information: tlv2171 thermal metric (1) tlv2171 unit d (soic) dgk (vssop) 8 pins 8 pins r ja junction-to-ambient thermal resistance 134.3 175.2 c/w r jc(top) junction-to-case (top) thermal resistance 72.1 74.9 c/w r jb junction-to-board thermal resistance 60.6 22.2 c/w jt junction-to-top characterization parameter 18.2 1.6 c/w jb junction-to-board characterization parameter 53.8 22.8 c/w r jc(bot) junction-to-case (bottom) thermal resistance ? ? c/w (1) for more information about traditional and new thermal metrics, see the semiconductor and ic package thermal metrics application report. 6.6 thermal information: tlv4171 thermal metric (1) tlv4171 unit d (soic) pw (tssop) 14 pins 14 pins r ja junction-to-ambient thermal resistance 93.2 106.9 c/w r jc(top) junction-to-case (top) thermal resistance 51.8 24.4 c/w r jb junction-to-board thermal resistance 49.4 59.3 c/w jt junction-to-top characterization parameter 13.5 0.6 c/w jb junction-to-board characterization parameter 42.2 54.3 c/w r jc(bot) junction-to-case (bottom) thermal resistance ? ? c/w
7 tlv171 , tlv2171 , tlv4171 www.ti.com sbos783 ? september 2016 product folder links: tlv171 tlv2171 tlv4171 submit documentation feedback copyright ? 2016, texas instruments incorporated (1) the input range can be extended beyond (v+) ? 2 v up to v+. see the typical characteristics and application and implementation sections for additional information. 6.7 electrical characteristics at t a = 25 c, v cm = v out = v s / 2, and r l = 10 k connected to v s / 2 (unless otherwise noted) parameter test conditions min typ max unit offset voltage v os input offset voltage t a = 25 c 0.75 2.7 mv t a = ? 40 c to +125 c 3.0 dv os /dt input offset voltage drift t a = ? 40 c to +125 c 1 v/ c psrr input offset voltage vs power supply v s = 4 v to 36 v, t a = ? 40 c to +125 c 90 105 db input bias current i b input bias current 10 pa i os input offset current 4 pa noise input voltage noise f = 0.1 hz to 10 hz 3 v pp e n input voltage noise density f = 100 hz 27 nv/ hz f = 1 khz 16 input voltage v cm common-mode voltage range (1) (v ? ) ? 0.1 (v+) ? 2 v cmrr common-mode rejection ratio v s = 18 v, (v ? ) ? 0.1 v < v cm < (v+) ? 2 v, t a = ? 40 c to +125 c 94 105 db input impedance differential 100 || 3 m || pf common-mode 6 || 3 10 12 || pf open-loop gain a ol open-loop voltage gain v s = 36 v, (v ? ) + 0.35 v < v o < (v+) ? 0.35 v, t a = ? 40 c to +125 c 94 130 db frequency response gbp gain bandwidth product 3.0 mhz sr slew rate g = +1 1.5 v/ s t s settling time to 0.1%, v s = 18 v, g = +1, 10-v step 6 s to 0.01% (12 bits), v s = 18 v, g = +1, 10-v step 10 overload recovery time v in gain > v s 2 s thd+n total harmonic distortion + noise g = +1, f = 1 khz, v o = 3 v rms 0.0002%
8 tlv171 , tlv2171 , tlv4171 sbos783 ? september 2016 www.ti.com product folder links: tlv171 tlv2171 tlv4171 submit documentation feedback copyright ? 2016, texas instruments incorporated electrical characteristics (continued) at t a = 25 c, v cm = v out = v s / 2, and r l = 10 k connected to v s / 2 (unless otherwise noted) parameter test conditions min typ max unit output v o voltage output swing positive rail, v s = 18 v, r l = 10 k , t a = 25 c 160 mv negative rail, v s = 18 v, r l = 10 k , t a = 25 c 90 mv r l = 10 k , a ol 94 db, t a = ? 40 c to +125 c (v ? ) + 0.35 (v+) ? 0.35 v i sc short-circuit current 25 ma ? 35 c load capacitive load drive see typical characteristics pf r o open-loop output resistance f = 1 mhz, i o = 0 a 150 power supply v s specified voltage range 2.7 36 v i q quiescent current per amplifier i o = 0 a, t a = ? 40 c to +125 c 525 695 a temperature specified range ? 40 125 c operating range ? 55 150 c
9 tlv171 , tlv2171 , tlv4171 www.ti.com sbos783 ? september 2016 product folder links: tlv171 tlv2171 tlv4171 submit documentation feedback copyright ? 2016, texas instruments incorporated 6.8 typical characteristics at v s = 18 v, v cm = v s / 2, r load = 10 k connected to v s / 2, and c l = 100 pf (unless otherwise noted) table 1. characteristic performance measurements description figure offset voltage production distribution figure 1 offset voltage vs common-mode voltage figure 2 offset voltage vs common-mode voltage (upper stage) figure 3 input bias current and input offset current vs temperature figure 4 output voltage swing vs output current (maximum supply) figure 5 cmrr and psrr vs frequency (referred-to-input) figure 6 0.1-hz to 10-hz noise figure 7 input voltage noise spectral density vs frequency figure 8 quiescent current vs supply voltage figure 9 open-loop gain and phase vs frequency figure 10 closed-loop gain vs frequency figure 11 open-loop gain vs temperature figure 12 open-loop output impedance vs frequency figure 13 small-signal overshoot vs capacitive load figure 14 , figure 15 no phase reversal figure 16 small-signal step response (100 mv) figure 17 , figure 18 large-signal step response figure 19 , figure 20 large-signal settling time (10-v positive step) figure 21 large-signal settling time (10-v negative step) figure 22 short-circuit current vs temperature figure 23 maximum output voltage vs frequency figure 24 emirr in+ vs frequency figure 25
10 tlv171 , tlv2171 , tlv4171 sbos783 ? september 2016 www.ti.com product folder links: tlv171 tlv2171 tlv4171 submit documentation feedback copyright ? 2016, texas instruments incorporated distribution taken from 3500 amplifiers figure 1. offset voltage production distribution 10 typical units shown figure 2. offset voltage vs common-mode voltage 10 typical units shown figure 3. offset voltage vs common-mode voltage (upper stage) figure 4. input bias current and input offset current vs temperature figure 5. output voltage swing vs output current (maximum supply) figure 6. cmrr and psrr vs frequency (referred-to input) 140120 100 8060 40 20 0 common-mode rejection ratio (db), power-supply rejection ratio (db) 1 10 100 1k 10k 10m frequency (hz) 100k 1m +psrr - psrr cmrr i b+ i b - i os 10000 1000 100 10 10 input bias current (pa) - 75 - 50 - 25 0 25 150 temperature ( c) 50 125 100 75 i b i os 10000 80006000 4000 2000 0 20004000 6000 8000 10000 -- - - - v ( v) m os 15.5 16 16.5 17 17.5 18 18.5 v (v) cm normal operation v = +18.1v cm - 1200 - 1100 - 1000 - 900 - 800 - 700 - 600 - 500 - 400 - 300 - 100 0 100200 300 400 500 600 700 800 900 1000 1200 offset voltage ( v) m percentage of amplifiers (%) 1614 12 10 86 4 2 0 - 200 1100 1000 800600 400 200 0 200400 600 800 1000 -- - - - v ( v) m os - 20 - 15 - 10 - 5 0 5 10 15 20 v (v) cm v = 18.1 v - cm 18 output voltage (v) 0 2 4 6 8 16 output current (ma) 10 12 14 1716 15 14.5 - 14.5 - 15 - 16 - 17 - 18 - 40 c +25 c +85 c +125 c
11 tlv171 , tlv2171 , tlv4171 www.ti.com sbos783 ? september 2016 product folder links: tlv171 tlv2171 tlv4171 submit documentation feedback copyright ? 2016, texas instruments incorporated figure 7. 0.1-hz to 10-hz noise figure 8. input voltage noise spectral density vs frequency figure 9. quiescent current vs supply voltage figure 10. open-loop gain and phase vs frequency figure 11. closed-loop gain vs frequency 5 typical units shown figure 12. open-loop gain vs temperature 2520 15 10 50 5 1015 20 - -- - gain (db) 10k 100m frequency (hz) 1m 100k 10m g = 10 g = 1 g = 1 - 3 2.5 2 1.5 1 0.5 0 a ( v/v) m ol - 75 150 temperature ( c) - 25 - 50 0 125 100 75 50 25 v = 2.7v s v = 4v s v = 36v s 0.6 0.55 0.5 0.45 0.4 0.35 0.3 0.25 i (ma) q 0 4 8 12 16 36 supply voltage (v) 32 28 24 20 specified supply-voltage range 180135 9045 0 45 - gain (db) 1 10 100 1k 10k 10m frequency (hz) 1m 100k phase gain phase ( ) 180135 90 45 0 - 45 1000 100 10 1 voltage noise density (nv/ ) ? hz 1 10 100 1k 10k 1m frequency (hz) 100k 1 v/div m time (1s/div)
12 tlv171 , tlv2171 , tlv4171 sbos783 ? september 2016 www.ti.com product folder links: tlv171 tlv2171 tlv4171 submit documentation feedback copyright ? 2016, texas instruments incorporated figure 13. open-loop output impedance vs frequency 100-mv output step, r l = 10 k figure 14. small-signal overshoot vs capacitive load 100-mv output step, r l = 10 k figure 15. small-signal overshoot vs capacitive load figure 16. no phase reversal r l = 10 k , c l = 100 pf figure 17. small-signal step response (100 mv) figure 18. small-signal step response (100 mv) 20mv/div time (1 s/div) m +18v - 18v c l r l g = +1 time (20 s/div) m 20mv/div +18v - 18v r 2k w f = r 2k w i = c l g = 1 - c = 100pf l w ww r = i 10k w r out c l r f = 10k w +18v - 18v g = 1 - 5v/div time (100 s/div) m +18v - 18v 37v pp sine wave ( 18.5v) w ww +18v - 18v r out c l r l g = +1 1m 100k 10k 1k 100 10 1 1m z ( ) w o 1 10 100 1k 10k 10m frequency (hz) 100k 1m
13 tlv171 , tlv2171 , tlv4171 www.ti.com sbos783 ? september 2016 product folder links: tlv171 tlv2171 tlv4171 submit documentation feedback copyright ? 2016, texas instruments incorporated g = +1, r l = 10 k , c l = 100 pf figure 19. large-signal step response g = ? 1, r l = 10 k , c l = 100 pf figure 20. large-signal step response 10-v positive step, g = ? 1 figure 21. large-signal settling time 10-v negative step, g = ? 1 figure 22. large-signal settling time figure 23. short-circuit current vs temperature figure 24. maximum output voltage vs frequency 20mv/div time (1 s/div) m +18v - 18v c l r l g = +1 5045 40 35 30 25 20 15 10 50 i (ma) sc - 75 - 50 - 25 0 25 150 temperature ( c) 50 125 i , source sc 100 75 i , sink sc 15 12.5 10 7.5 5 2.5 0 output voltage (v ) pp 10k 100k 1m 10m frequency (hz) v = 15v s v = 5v s v = 1.35v s maximum output voltage withoutslew-rate induced distortion. 10 86 4 2 0 2 4 6 8 10 -- - - - d from final value (mv) 0 36 time ( s) m 8 4 28 32 24 20 16 12 12-bit settling ( 1/2lsb = 0.024%) 10 86 4 2 0 2 4 6 8 10 -- - - - d from final value (mv) 0 36 time ( s) m 8 4 28 32 24 20 16 12 12-bit settling ( 1/2lsb = 0.024%) time (4 s/div) m 2v/div
14 tlv171 , tlv2171 , tlv4171 sbos783 ? september 2016 www.ti.com product folder links: tlv171 tlv2171 tlv4171 submit documentation feedback copyright ? 2016, texas instruments incorporated figure 25. emirr in+ vs frequency frequency (mhz) emirr in+ (db) 0 20 40 60 80 100 120 10 100 1k 10k
15 tlv171 , tlv2171 , tlv4171 www.ti.com sbos783 ? september 2016 product folder links: tlv171 tlv2171 tlv4171 submit documentation feedback copyright ? 2016, texas instruments incorporated 7 detailed description 7.1 overview the tlvx171 family of operational amplifiers provides high overall performance, making these devices ideal for many general-purpose applications. the excellent offset drift of only 2 v/ c provides excellent stability over the entire temperature range. in addition, the device family offers very good overall performance with high common- mode rejection ratio (cmrr), power-supply rejection ratio (psrr), and open-loop voltage gain (a ol ). 7.2 functional block diagram 7.3 feature description 7.3.1 operating characteristics the tlvx171 family of amplifiers is specified for operation from 2.7 v to 36 v, single supply ( 1.35 v to 18 v, dual supply). many of the specifications apply from ? 40 c to +125 c. parameters that can exhibit significant variance with regard to operating voltage or temperature are presented in the typical characteristics section. nch input stage pch input stage 2 nd stage output stage in+ in- ca cb pch ff stage out copyright ? 2016, texas instruments incorporated
16 tlv171 , tlv2171 , tlv4171 sbos783 ? september 2016 www.ti.com product folder links: tlv171 tlv2171 tlv4171 submit documentation feedback copyright ? 2016, texas instruments incorporated feature description (continued) 7.3.2 phase-reversal protection the tlvx171 family has an internal phase-reversal protection. many operational amplifiers exhibit a phase reversal when the input is driven beyond the linear common-mode range. this condition is most often encountered in noninverting circuits when the input is driven beyond the specified common-mode voltage range, causing the output to reverse into the opposite rail. the input of the tlvx171 prevents phase reversal with excessive common-mode voltage. instead, the output limits into the appropriate rail. this performance is shown in figure 26 . figure 26. no phase reversal 7.3.3 electrical overstress designers often ask questions about the capability of an operational amplifier to withstand electrical overstress. these questions tend to focus on the device inputs, but can involve the supply voltage pins or even the output pin. each of these different pin functions have electrical stress limits determined by the voltage breakdown characteristics of the particular semiconductor fabrication process and specific circuits connected to the pin. additionally, internal electrostatic discharge (esd) protection is built into these circuits for protection from accidental esd events both before and during product assembly. a good understanding of this basic esd circuitry and the relevance to an electrical overstress event is helpful. figure 27 illustrates the esd circuits contained in the tlvx171 (indicated by the dashed line area). the esd protection circuitry involves several current-steering diodes connected from the input and output pins and routed back to the internal power-supply lines, where the diodes meet at an absorption device internal to the operational amplifier. this protection circuitry is intended to remain inactive during normal circuit operation. 5v/div time (100 s/div) m +18v - 18v 37v pp sine wave ( 18.5v)
17 tlv171 , tlv2171 , tlv4171 www.ti.com sbos783 ? september 2016 product folder links: tlv171 tlv2171 tlv4171 submit documentation feedback copyright ? 2016, texas instruments incorporated feature description (continued) figure 27. equivalent internal esd circuitry relative to a typical circuit application an esd event produces a short-duration, high-voltage pulse that is transformed into a short-duration, high- current pulse when discharging through a semiconductor device. the esd protection circuits are designed to provide a current path around the operational amplifier core to prevent damage. the energy absorbed by the protection circuitry is then dissipated as heat. when an esd voltage develops across two or more amplifier device pins, current flows through one or more steering diodes. depending on the path that the current takes, the absorption device can activate. the absorption device has a trigger, or threshold voltage, that is above the normal operating voltage of the tlvx171 but below the device breakdown voltage level. when this threshold is exceeded, the absorption device quickly activates and clamps the voltage across the supply rails to a safe level. when the operational amplifier connects into a circuit (as shown in figure 27 ), the esd protection components are intended to remain inactive and do not become involved in the application circuit operation. however, circumstances may arise where an applied voltage exceeds the operating voltage range of a given pin. if this condition occurs, there is a risk that some internal esd protection circuits can turn on and conduct current. any such current flow occurs through steering-diode paths and rarely involves the absorption device. figure 27 shows a specific example where the input voltage (v in ) exceeds the positive supply voltage (v+) by 500 mv or more. much of what happens in the circuit depends on the supply characteristics. if v+ can sink the current, one of the upper input steering diodes conducts and directs current to v+. excessively high current levels can flow with increasingly higher v in . as a result, the data sheet specifications recommend that applications limit the input current to 10 ma. if the supply is not capable of sinking the current, v in can begin sourcing current to the operational amplifier and then take over as the source of positive supply voltage. the danger in this case is that the voltage can rise to levels that exceed the operational amplifier absolute maximum ratings. power-supply esd cell 250 ? 250 ? in in+ r 1 r s r f tvs r l v in v s i d + tvs +v s + + + copyright ? 2016, texas instruments incorporated
18 tlv171 , tlv2171 , tlv4171 sbos783 ? september 2016 www.ti.com product folder links: tlv171 tlv2171 tlv4171 submit documentation feedback copyright ? 2016, texas instruments incorporated feature description (continued) another common question involves what happens to the amplifier if an input signal is applied to the input when the power supplies (v+ or v ? ) are at 0 v. again, this question depends on the supply characteristic when at 0 v, or at a level below the input signal amplitude. if the supplies appear as high impedance, then the input source supplies the operational amplifier current through the current-steering diodes. this state is not a normal bias condition; most likely, the amplifier does not operate normally. if the supplies are low impedance, then the current through the steering diodes can become quite high. the current level depends on the ability of the input source to deliver current, and any resistance in the input path. if there is any uncertainty about the ability of the supply to absorb this current, add external zener diodes to the supply pins; see figure 27 . select the zener voltage so that the diode does not turn on during normal operation. however, the zener voltage must be low enough so that the zener diode conducts if the supply pin begins to rise above the safe-operating, supply-voltage level. the tlvx171 input pins are protected from excessive differential voltage with back-to-back diodes; see figure 27 . in most circuit applications, the input protection circuitry has no effect. however, in low-gain or g = 1 circuits, fast-ramping input signals can forward-bias these diodes because the output of the amplifier cannot respond rapidly enough to the input ramp. if the input signal is fast enough to create this forward-bias condition, limit the input signal current to 10 ma or less. if the input signal current is not inherently limited, an input series resistor can be used to limit the input signal current. this input series resistor degrades the low-noise performance of the tlvx171. figure 27 illustrates an example configuration that implements a current-limiting feedback resistor. 7.3.4 capacitive load and stability the dynamic characteristics of the tlvx171 are optimized for common operating conditions. the combination of low closed-loop gain and high capacitive loads decreases the phase margin of the amplifier and can lead to gain peaking or oscillations. as a result, heavier capacitive loads must be isolated from the output. the simplest way to achieve this isolation is to add a small resistor (for example, r out equal to 50 ) in series with the output. figure 28 and figure 29 show graphs of small-signal overshoot versus capacitive load for several values of r out . also, see applications bulletin ab-028, feedback plots define op amp ac performance for details of analysis techniques and application circuits. 100-mv output step, g = 1, r l = 10 k figure 28. small-signal overshoot vs capacitive load 100-mv output step, g = ? 1, r l = 10 k figure 29. small-signal overshoot vs capacitive load w ww r = i 10k w r out c l r f = 10k w +18v - 18v g = 1 - w ww +18v - 18v r out c l r l g = +1
19 tlv171 , tlv2171 , tlv4171 www.ti.com sbos783 ? september 2016 product folder links: tlv171 tlv2171 tlv4171 submit documentation feedback copyright ? 2016, texas instruments incorporated 7.4 device functional modes 7.4.1 common-mode voltage range the input common-mode voltage range of the tlvx171 family extends 100 mv below the negative rail and within 2 v of the top rail for normal operation. this device family can operate with a full rail-to-rail input 100 mv beyond the top rail, but with reduced performance within 2 v of the top rail. 7.4.2 overload recovery overload recovery is defined as the time required for the operational amplifier output to recover from the saturated state to the linear state. the output devices of the operational amplifier enter the saturation region when the output voltage exceeds the rated operating voltage, either resulting from the high input voltage or the high gain. after the device enters the saturation region, the charge carriers in the output devices need time to return back to the normal state. after the charge carriers return back to the equilibrium state, the device begins to slew at the normal slew rate. thus, the propagation delay in case of an overload condition is the sum of the overload recovery time and the slew time. the overload recovery time for the tlvx171 is approximately 2 s.
20 tlv171 , tlv2171 , tlv4171 sbos783 ? september 2016 www.ti.com product folder links: tlv171 tlv2171 tlv4171 submit documentation feedback copyright ? 2016, texas instruments incorporated 8 application and implementation note information in the following applications sections is not part of the ti component specification, and ti does not warrant its accuracy or completeness. ti ? s customers are responsible for determining suitability of components for their purposes. customers should validate and test their design implementation to confirm system functionality. 8.1 application information the tlvx171 family of operational amplifiers provides high overall performance in a large number of general- purpose applications. as with all amplifiers, applications with noisy or high-impedance power supplies require decoupling capacitors placed close to the device pins. in most cases, 0.1- f capacitors are adequate. follow the additional recommendations in the layout guidelines section in order to achieve the maximum performance from this device. many applications can introduce capacitive loading to the output of the amplifier (potentially causing instability). one method of stabilizing the amplifier in such applications is to add an isolation resistor between the amplifier output and the capacitive load. the design process for selecting this resistor is given in the typical application section. 8.2 typical application this circuit can be used to drive capacitive loads such as cable shields, reference buffers, mosfet gates, and diodes. the circuit uses an isolation resistor (r iso ) to stabilize the output of an operational amplifier. r iso modifies the open-loop gain of the system to ensure that the circuit has sufficient phase margin. figure 30. unity-gain buffer with r iso stability compensation 8.2.1 design requirements the design requirements are: ? supply voltage: 30 v ( 15 v) ? capacitive loads: 100 pf, 1000 pf, 0.01 f, 0.1 f, and 1 f ? phase margin: 45 and 60 8.2.2 detailed design procedure figure 30 shows a unity-gain buffer driving a capacitive load. equation 1 shows the transfer function for the circuit in figure 30 . not shown in figure 30 is the open-loop output resistance of the operational amplifier, r o . (1) the transfer function in equation 1 has a pole and a zero. the frequency of the pole (f p ) is determined by (r o + r iso ) and c load . components r iso and c load determine the frequency of the zero (f z ). a stable system is obtained by selecting r iso such that the rate of closure (roc) between the open-loop gain (a ol ) and 1/ is 20 db/decade. figure 31 illustrates this concept. the 1/ curve for a unity-gain buffer is 0 db. load iso o iso load 1 + c r s t(s) = 1 + r + r c s + c load + v in v out +v s r iso -v s copyright ? 2016, texas instruments incorporated
21 tlv171 , tlv2171 , tlv4171 www.ti.com sbos783 ? september 2016 product folder links: tlv171 tlv2171 tlv4171 submit documentation feedback copyright ? 2016, texas instruments incorporated typical application (continued) figure 31. unity-gain amplifier with r iso compensation roc stability analysis is typically simulated. the validity of the analysis depends on multiple factors, especially the accurate modeling of r o . in addition to simulating the roc, a robust stability analysis includes a measurement of overshoot percentage and ac gain peaking of the circuit using a function generator, oscilloscope, and gain and phase analyzer. phase margin is then calculated from these measurements. table 2 shows the overshoot percentage and ac gain peaking that correspond to phase margins of 45 and 60 . for more details on this design and other alternative devices that can be used in place of the tlv171, see the precision design, capacitive load drive solution using an isolation resistor . table 2. phase margin versus overshoot and ac gain peaking phase margin overshoot ac gain peaking 45 23.3% 2.35 db 60 8.8% 0.28 db 8.2.3 application curve using the described methodology, the values of r iso that yield phase margins of 45 o and 60 o for various capacitive loads were determined. the results are shown in figure 32 . figure 32. isolation resistor required for various capacitive loads to achieve a target phase margin 10 100 1000 10000 0.1 1 10 100 1000 isolation resistor (r iso , ) capacitive load (nf) 45 phase margin 60 phase margin c002 gain (db) 0 a ol 1/ 20 40 60 80 10 100 1k 10k 100k 1m 100 120 10m 100m frequency (hz) 20 db roc dec 40 db 1 dec z iso load 1 f 2 r c ? u u u p iso o load 1 f 2 r r c ? u u u
22 tlv171 , tlv2171 , tlv4171 sbos783 ? september 2016 www.ti.com product folder links: tlv171 tlv2171 tlv4171 submit documentation feedback copyright ? 2016, texas instruments incorporated 9 power supply recommendations the tlvx171 is specified for operation from 2.7 v to 36 v ( 1.35 v to 18 v); many specifications apply from ? 40 c to +85 c. parameters that can exhibit significant variance with regard to operating voltage or temperature are presented in the typical characteristics section. caution supply voltages larger than 40 v can permanently damage the device; see the absolute maximum ratings table. place 0.1- f bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or high- impedance power supplies. for more detailed information on bypass capacitor placement, see the layout section. 10 layout 10.1 layout guidelines for best operational performance of the device, use good printed-circuit board (pcb) layout practices, including: ? noise can propagate into analog circuitry through the power pins of the circuit as a whole and the operational amplifier itself. bypass capacitors are used to reduce the coupled noise by providing low- impedance power sources local to the analog circuitry. ? connect low-esr, 0.1- f ceramic bypass capacitors between each supply pin and ground, placed as close to the device as possible. a single bypass capacitor from v+ to ground is applicable for single- supply applications. ? separate grounding for analog and digital portions of circuitry is one of the simplest and most-effective methods of noise suppression. one or more layers on multilayer pcbs are usually devoted to ground planes. a ground plane helps distribute heat and reduces emi noise pickup. make sure to physically separate digital and analog grounds, paying attention to the flow of the ground current. ? in order to reduce parasitic coupling, run the input traces as far away from the supply or output traces as possible. if these traces cannot be kept separate, crossing the sensitive trace perpendicularly is much better than in parallel with the noisy trace. ? place the external components as close to the device as possible. as illustrated in figure 34 , keeping r f and r g close to the inverting input minimizes parasitic capacitance. ? keep the length of input traces as short as possible. always remember that the input traces are the most sensitive part of the circuit. ? consider a driven, low-impedance guard ring around the critical traces. a guard ring can significantly reduce leakage currents from nearby traces that are at different potentials.
23 tlv171 , tlv2171 , tlv4171 www.ti.com sbos783 ? september 2016 product folder links: tlv171 tlv2171 tlv4171 submit documentation feedback copyright ? 2016, texas instruments incorporated 10.2 layout example figure 33. schematic representation figure 34. operational amplifier board layout for a noninverting configuration n/c in +in v v+ output n/c n/c vs+ gnd vs gnd ground (gnd) plane on another layer vout vin gnd run the input traces as far away from the supply lines as possible use low-esr, ceramic bypass capacitor rf rg place components close to device and to each other to reduce parasitic errors use low-esr, ceramic bypass capacitor + vin vout rg rf copyright ? 2016, texas instruments incorporated
24 tlv171 , tlv2171 , tlv4171 sbos783 ? september 2016 www.ti.com product folder links: tlv171 tlv2171 tlv4171 submit documentation feedback copyright ? 2016, texas instruments incorporated 11 device and documentation support 11.1 device support 11.1.1 development support 11.1.1.1 tina-ti ? (free software download) tina ? is a simple, powerful, and easy-to-use circuit simulation program based on a spice engine. tina-ti ? is a free, fully-functional version of the tina software, preloaded with a library of macromodels in addition to a range of both passive and active models. tina-ti ? provides all the conventional dc, transient, and frequency domain analysis of spice, as well as additional design capabilities. available as a free download from the analog elab design center, tina-ti ? offers extensive post-processing capability that allows users to format results in a variety of ways. virtual instruments offer the ability to select input waveforms and probe circuit nodes, voltages, and waveforms, thus creating a dynamic quick-start tool. note these files require that either the tina software (from designsoft ? ) or the tina-ti ? software be installed. download the free tina-ti ? software from the tina-ti ? folder . 11.1.1.2 dip adapter evm the dip adapter evm tool provides an easy, low-cost way to prototype small surface-mount devices. the evaluation tool these ti packages: d or u (soic-8), pw (tssop-8), dgk (vssop-8), dbv (sot23-6, sot23- 5, and sot23-3), dck (sc70-6 and sc70-5), and drl (sot563-6). the dip adapter evm can also be used with terminal strips or can be wired directly to existing circuits. 11.1.1.3 universal op amp evm the universal op amp evm is a series of general-purpose, blank circuit boards that simplify prototyping circuits for a variety of device package types. the evaluation module board design allows many different circuits to be constructed easily and quickly. five models are offered, with each model intended for a specific package type. pdip, soic, msop, tssop, and sot23 packages are all supported. note these boards are unpopulated, so users must provide their own devices. ti recommends requesting several op amp device samples when ordering the universal op amp evm. 11.1.1.4 ti precision designs ti precision designs are analog solutions created by ti ? s precision analog applications experts and offer the theory of operation, component selection, simulation, a complete pcb schematic and layout, bill of materials, and measured performance of many useful circuits. ti precision designs are available online at http://www.ti.com/ww/en/analog/precision-designs/ . 11.1.1.5 webench ? filter designer the webench ? filter designer is a simple, powerful, and easy-to-use active filter design program. the webench ? filter designer enables optimized filter designs to be created by using a selection of ti operational amplifiers and passive components from ti's vendor partners. available as a web-based tool from the webench ? design center, the webench ? filter designer allows complete multistage active filter solutions to be designed, optimized, and simulated within minutes.
25 tlv171 , tlv2171 , tlv4171 www.ti.com sbos783 ? september 2016 product folder links: tlv171 tlv2171 tlv4171 submit documentation feedback copyright ? 2016, texas instruments incorporated 11.2 documentation support 11.2.1 related documentation for related documentation see the following: feedback plots define op amp ac performance application bulletin (sboa015) 11.3 related links table 3 lists quick access links. categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. table 3. related links parts product folder sample & buy technical documents tools & software support & community tlv171 click here click here click here click here click here tlv2171 click here click here click here click here click here tlv4171 click here click here click here click here click here 11.4 receiving notification of documentation updates to receive notification of documentation updates, navigate to the device product folder on ti.com . in the upper right corner, click on alert me to register and receive a weekly digest of any product information that has changed. for change details, review the revision history included in any revised document. 11.5 community resources the following links connect to ti community resources. linked contents are provided "as is" by the respective contributors. they do not constitute ti specifications and do not necessarily reflect ti's views; see ti's terms of use . ti e2e ? online community ti's engineer-to-engineer (e2e) community. created to foster collaboration among engineers. at e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. design support ti's design support quickly find helpful e2e forums along with design support tools and contact information for technical support. 11.6 trademarks tina-ti, e2e are trademarks of texas instruments. webench is a registered trademark of texas instruments. tina, designsoft are trademarks of designsoft, inc. all other trademarks are the property of their respective owners. 11.7 electrostatic discharge caution these devices have limited built-in esd protection. the leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the mos gates. 11.8 glossary slyz022 ? ti glossary . this glossary lists and explains terms, acronyms, and definitions. 12 mechanical, packaging, and orderable information the following pages include mechanical, packaging, and orderable information. this information is the most current data available for the designated devices. this data is subject to change without notice and revision of this document. for browser-based versions of this data sheet, refer to the left-hand navigation.
package option addendum www.ti.com 2-apr-2017 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples TLV171IDBVR active sot-23 dbv 5 3000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 14rt tlv171idbvt active sot-23 dbv 5 250 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 14rt tlv171idr active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 tlv171 tlv2171idgkr active vssop dgk 8 2500 green (rohs & no sb/br) cu nipdauag level-2-260c-1 year -40 to 125 14ov tlv2171idgkt active vssop dgk 8 250 green (rohs & no sb/br) cu nipdauag level-2-260c-1 year -40 to 125 14ov tlv2171idr active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 tl2171 tlv4171id active soic d 14 50 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 tlv4171 tlv4171idr active soic d 14 2500 green (rohs & no sb/br) cu nipdau level-3-260c-168 hr -40 to 125 tlv4171 tlv4171ipwr active tssop pw 14 2000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 125 tlv4171 (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material)
package option addendum www.ti.com 2-apr-2017 addendum-page 2 (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device. (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis.
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant TLV171IDBVR sot-23 dbv 5 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 q3 tlv171idbvt sot-23 dbv 5 250 180.0 8.4 3.23 3.17 1.37 4.0 8.0 q3 tlv171idr soic d 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 q1 tlv2171idgkr vssop dgk 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 q1 tlv2171idgkt vssop dgk 8 250 330.0 12.4 5.3 3.4 1.4 8.0 12.0 q1 tlv2171idr soic d 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 q1 tlv4171idr soic d 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 q1 tlv4171ipwr tssop pw 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 q1 package materials information www.ti.com 1-apr-2017 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) TLV171IDBVR sot-23 dbv 5 3000 202.0 201.0 28.0 tlv171idbvt sot-23 dbv 5 250 223.0 270.0 35.0 tlv171idr soic d 8 2500 367.0 367.0 35.0 tlv2171idgkr vssop dgk 8 2500 366.0 364.0 50.0 tlv2171idgkt vssop dgk 8 250 366.0 364.0 50.0 tlv2171idr soic d 8 2500 367.0 367.0 35.0 tlv4171idr soic d 14 2500 367.0 367.0 38.0 tlv4171ipwr tssop pw 14 2000 367.0 367.0 35.0 package materials information www.ti.com 1-apr-2017 pack materials-page 2

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